HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 369

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
31
30
29
28
27
26 to 22 ⎯
Bit
Name
RASD
MRSET
TRC2
TRC1
TRC0
Initial
Value
0
0
0
0
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
RAS Down
Sets RAS down mode. Do not set RAS down mode
when specifying areas 2 and 3 as synchronous DRAM
interface.
0: Normal mode
1: RAS down mode
Note: When using synchronous DRAM in RAS down
Mode Register Set
Set this bit to 1 to make the mode register setting for
synchronous DRAM. See the description of power-on
sequence in section 10.6.4, (10) Power-On Sequence.
0: All-bank precharge
1: Mode register setting
RAS Precharge Time after Refresh
(Both auto- and self-refresh are available for synchro-
nous DRAM)
000:
001:
010:
011:
100:
101:
110:
111:
Reserved
These bits are always read as 0. The write value should
always be 0.
mode, set the DMAIW2 to DMAIW0 bits to 000 and
A3IW2 to A3IW0 bits to 000.
RAS precharge time immediately after refresh
0
3
6
9
12
15
18
21
Rev. 2.00 Feb. 12, 2010 Page 285 of 1330
REJ09B0554-0200