HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 943

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
23.3.4
SPTBR is a 32-bit readable/writable register that stores data to be transmitted.
Initial value:
Initial value:
Bit
2
1
0
Bit
31 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Transmit Buffer Register (SPTBR)
Bit Name
RXDE
TXDE
MASL
Bit Name
TD
31
15
R
R
-
-
-
-
30
14
R
R
-
-
-
-
29
13
R
R
-
-
-
-
Initial Value
0
0
0
Initial Value
All ⎯
All 0
28
12
R
R
-
-
-
-
27
11
R
R
-
-
-
-
R/W
R/W
R/W
R/W
R/W
R
R/W
26
10
R
R
-
-
-
-
25
R
R
-
9
-
-
-
Description
Receive DMA Enable
0: Receive DMA transfer request disabled
1: Receive DMA transfer request enabled
Transmit DMA Enable
0: Transmit DMA transfer request disabled
1: Transmit DMA transfer request enabled
Master/Slave Select Bit
0: HSPI module configured as a slave
1: HSPI module configured as a master
Description
Reserved
These bits are always read as an undefined
value. The write value should always be 0.
Transmit Data
Data written to this register is transferred to the
shift register for transmission.
When reading these bits, always read as data
stored in the transmit buffer.
24
R
R
8
-
-
-
-
R/W
23
R
7
0
-
-
Rev. 2.00 Feb. 12, 2010 Page 859 of 1330
R/W
22
R
6
0
-
-
R/W
21
R
5
0
-
-
R/W
20
R
4
0
-
-
TD
R/W
19
R
3
0
-
-
REJ09B0554-0200
R/W
18
R
2
0
-
-
R/W
17
R
1
0
-
-
R/W
16
R
0
0
-
-

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