HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1098

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
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Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
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Quantity:
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27.5
This section describes the 8-bit parallel interface using the MFI. The MFI interface enables access
to the 68 and 80 series. Access via the MFI is complete within a fixed time.
27.5.1
Figure 27.4 shows the basic read/write sequence for the 68-series 8-bit parallel interface. MFI
access is limited to the period during which the MFI-E/WR signal is driven high and the MFI-CS
signal is simultaneously driven low. During this period, a write operation is performed with the
MFI-RW/RD signal driven low; a read operation is performed with this signal driven high. The
MFI-RS signal indicates whether this is normal access or index/status register access; the low
level indicates normal access, and the high level indicates an index/status register access.
For details of the timing, refer to section 33, Electrical Characteristics.
Rev. 2.00 Feb. 12, 2010 Page 1014 of 1330
REJ09B0554-0200
MFI-D15 - MFI-D0
MFI-CS
MFI-RS
MFI-E/WR
MFI-RW/RD
Interface (Basic)
68-Series 8-Bit Parallel Interface
Figure 27.4 Basic Timing for the MFI 68-Series Interface
Write cycle
WT_D
Read cycle
RD_D
WT_D: Write data
RD_D: Read data

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