HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 95

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

1.3
W
A
B
C
D
E
G
H
K
M
N
P
R
U
V
Y
F
J
L
T
EXTAL
RESET
RDY
DCK
VCPWC/
IRQ4
MFI-D8/
LCD_DATA8
MFI-D9/
LCD_DATA9
MFI-D10/
LCD_DATA10
MFI-D11/
LCD_DATA11
MFI-D12/
LCD_DATA12
MFI-D13/
LCD_DATA13
MFI-D14/
LCD_DATA14
MFI-D15/
LCD_DATA15
MFI-INT/
LCD_CLK
MFI-E/
LCD_CL1
MFI-RS/
LCD_M_DISP
D0
D1
D2
D13
1
1
XTAL
VSS-CPG
HAC_
BIT_CLK0
SSI1_SCK/
HAC_
SD_IN1
VEPWC/
IRQ5
MFI-D0/
LCD_DATA0
MFI-D1/
LCD_DATA1
MFI-D2/
LCD_DATA2/
IRQ6
MFI-D3/
LCD_DATA3/
IRQ7
MFI-D4/
LCD_DATA4/
DREQ2
MFI-D5/
LCD_DATA5/
DRAK2/DACK2
MFI-D6/
LCD_DATA6/
DREQ3
MFI-D7/
LCD_DATA7/
DRAK3/DACK3
MFI-CS/
LCD_DON
MFI-MD/
LCD_CL2
MFI-RW/
LCD_FLM
D15
D14
VSSQ
D12
Pin Arrangement
2
2
VDD-CPG
VDD-PLL2
VSS-PLL2
SSI1_WS/
HAC_
SYNC1
CA
CS0
VDD
VDDQ
CS1
VDDQ
CS4
VDDQ
CS5
VDD
CS6
BS
D3
VDDQ
D4
D5
3
3
VDD-PLL1
VSS-PLL1
HAC_RES
HAC_
BIT_CLK1
BREQ
BACK
VSS
VSSQ
CS2
VSSQ
A20
VSSQ
A21
VSS
A0
A1
D11
D10
D6
D9
Figure 1.2 SH7760 Pin Arrangement (BP-256F/BP-256FV)
4
4
SSI0_SCK/
HAC_SD_IN0/
BS2
SSI0_WS/
HAC_SYNC0
SSI0_SDATA/
HAC_
SD_OUT0
MRESET
VSSQ
VDDQ
D7
D8
5
5
HSPI_TX/
SIM_D/
MCDAT
HSPI_RX
SSI1_SDATA
HAC_
SD_OUT1
STATUS0
CKE
A2
RD/WR
RD/
CASS/
FRAME
6
6
HSPI_CLK/
SIM_CLK/
MCCLK
HSPI_CS/
SIM_RST/
MCCMD
VDD
VSS
VSS
VDD
WE0/
DQM0/
REG
WE1/
DQM1
7
7
CMT_CTR1
CMT_CTR0/
TCLK
ASEBRK/
BRKACK
STATUS1
VSSQ
VDDQ
A4
A3
8
8
CMT_CTR3
CMT_CTR2
VDDQ
VSSQ
A17
A7
A6
A5
P-LBGA 256-21
(BP-256F/BP-256FV)
9
9
SCIF2_CLK
NMI
TMS
TRST
VSSQ
VDDQ
A8
CKIO
TOP
10
10
SCIF2_TXD
SCIF1_CLK
VDDQ
VSSQ
VSSQ
VDDQ
A10
A9
×
11
11
21
SCIF2_RXD
SCIF1_TXD
TDO
TDI
VSSQ
VDDQ
A12
A11
×
1.0
12
12
SCIF2_CTS
SCIF1_RXD
VDDQ
VSSQ
A18
A15
A14
A13
Rev. 2.00 Feb. 12, 2010 Page 11 of 1330
13
13
SCIF2_RTS
SCIF1_CTS
VDD
VSS
VSS
VDD
WE2/
DQM2/
ICIORD
WE3/
DQM3/
ICIOWR
14
14
SCIF0_CLK
SCIF1_RTS
TCK
VSSQ
A19
A16
RAS
CS3
15
15
SCIF0_TXD
SCIF0_RXD
MD2
MD0
VSSQ
VDDQ
D24
D23
16
16
MD4/
CE2B
MD3/
CE2A
DRAK0
MD1
VSSQ
I2C1_SCL
VSS
MD7
VSSQ
AVss_ADC
AN3
VSSQ
VSSQ
VSS
A24
A22
D20
D21
D25
D22
17
17
REJ09B0554-0200
DACK0
VSS-PLL3
USB_PENC
DRAK1
VDDQ
I2C1_SDA
VDD
MD8
VDDQ
AVcc_ADC
AN2
VDDQ
VDDQ
VDD
A25
A23
D28
VDDQ
D27
D26
18
18
VDD-PLL3
USB_DM
VSSQ
DACK1
DREQ0
I2C0_SCL
MD6/
IOIS16
Reserved/
AUDCK
Reserved/
AUDATA[2]
AN1
IRL3
IRL1
CAN0_
NERR/
AUDCK
CAN0_RX/
AUDATA[2]
CAN0_TX/
AUDATA[0]
D16
D17
VSSQ
D19
ADTRG/
AUDATA[0]
19
19
UCLK
VDDQ
USB_DP
USB_OVC
DREQ1
I2C0_SDA
MD5
Reserved/
AUDSYNC
Reserved/
AUDATA[3]
Reserved/
AUDATA[1]
AN0
IRL2
IRL0
CAN1_
NERR/
AUDSYNC
CAN1_RX/
AUDATA[3]
CAN1_TX/
AUDATA[1]
D31
D30
D29
D18
20
20
M
W
A
B
C
D
E
F
G
H
K
N
P
R
T
U
V
Y
J
L