HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 866

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
21.4
The USB host has on-chip 8-Kbyte SRAM as a shared memory which is defined in the OpenHCI
specification. Write access to the shared memory is possible in bytes, words, or longwords. The
data format is little endian. The MSB is bit 31 and the LSB is bit 0. The user can use the endian
conversion in bytes or in words by rewriting an appropriate value in the CVRT bit in DMAUCR.
Figure 21.2 shows a memory map of the shared memory.
When area P4 is selected as the register area, the CPU sees the shared memory area to be mapped
into H'FE34 1000 to H'FE34 2FFF, while the HC sees it to be mapped into H'0000 0000 to H'0000
1FFF. Therefore when the HC accesses the shared memory, the area from H'0000 0000 to H'0000
1FFF must be specified.
When USB HC (Host controller) reads the data at the following 4 Kbyte boundary address in the
USB shared memory, the wrong data may be returned to USB HC.
The wrong access address whish USB HC (Host controller) is using.
The shared memory area is mapped into H'FE34 1000 to H'FE34 2FFF in area P4 or into H'1E34
1000 to H'1E34 2FFF in area 7. For details, see section 32, List of Registers.
Rev. 2.00 Feb. 12, 2010 Page 782 of 1330
REJ09B0554-0200
Memory
H'0000 0FFC— H'0000 0FFF
H'0000 1FFC— H'0000 1FFF
CPU
Figure 21.2 Memory Map of Shared Memory
H'FE34 2FFF
H'FE34 1000
Shared memory
H'0000 1FFF
H'0000 0000
Host controller
USB host
(HC)

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