HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 675

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
2
1
Bit Name
PER
RDF
Initial Value
0
0
R/W
R
R/W*
1
Description
Parity Error
In asynchronous mode, indicates whether or not
a parity error has been found in the data that is to
be read next from SCFRDR.
0: There is no parity error that is to be read from
[Clearing conditions]
•
•
1: There is a parity error in the receive data that
[Setting condition]
•
Receive FIFO Data Full
Indicates that the received data has been
transferred from SCRSR to SCFRDR, and the
number of receive data bytes in SCFRDR is
equal to or greater than the receive trigger
number set by bits RTRG1 and RTRG0 in
SCFCR.
0: The number of receive data bytes in SCFRDR
[Clearing conditions]
•
•
•
1: The number of receive data bytes in SCFRDR
[Setting condition]
•
SCFRDR
is to be read from SCFRDR
is equal to or greater than the receive trigger
set number
is less than the receive trigger set number
Power-on reset or manual reset
When there is no parity error in the data that
is to be read next from SCFRDR
to be read next from SCFRDR
Power-on reset or manual reset
When SCFRDR is read until the number of
receive data bytes in SCFRDR falls below the
receive trigger set number after reading RDF
= 1, and 0 is written to RDF
When SCFRDR is read by the DMAC until the
number of receive data bytes in SCFRDR
falls below the receive trigger set number
trigger set number of receive data bytes*
When there is a parity error in the data that is
When SCFRDR contains at least the receive
Rev. 2.00 Feb. 12, 2010 Page 591 of 1330
REJ09B0554-0200
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