HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 955

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Register Name
Port B data register
Port C data register
Port D data register
Port E data register
Port F data register
Port G data register
Port H data register
Port J data register
Port K data register
GPIO interrupt control register
Table 24.2 Register Configuration (2)
Register Name
Input pin pull-up control register
DMA pin control register
SCIF Hi-Z control register
Peripheral module select register
Port A pull-up control register
Port B pull-up control register
Port C pull-up control register
Port D pull-up control register
Port E pull-up control register
Port F pull-up control register
Port G pull-up control register
Port H pull-up control register
Port J pull-up control register
Port K pull-up control register
Mode pin pull-up control register
Mode select register
Abbrev.
PBDR
PCDR
PDDR
PEDR
PFDR
PGDR
PHDR
PJDR
PKDR
GPIOIC
INPUPA
DMAPCR H'A550
SCIHZR
IPSELR
PAPUPR
PBPUPR
PCPUPR
PDPUPR
PEPUPR
PFPUPR
PGPUPR
PHPUPR
PJPUPR
PKPUPR
MDPUPR H'38
MODSELR H'00
Abbrev.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
H'FF00
H'0000
H'0003
H'FC
H'FE
H'FF
H'FF
H'FF
H'0F
H'FF
H'FF
H'FC
H'FC
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
P4 Address
H'FE40 0044
H'FE40 0048
H'FE40 004C
H'FE40 0050
H'FE40 0054
H'FE40 0058
H'FE40 005C
H'FE40 0060
H'FE40 0064
H'FE80 0048
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Rev. 2.00 Feb. 12, 2010 Page 871 of 1330
Area 7 Address Size
H'1E40 0044
H'1E40 0048
H'1E40 0050
H'1E40 0054
H'1E40 0058
H'1E40 005C
H'1E40 0060
H'1E40 0064
H'1E80 0048
H'1E40 004C
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
by
Hardware
REJ09B0554-0200
8
8
8
8
8
8
8
8
8
16
*
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
by
Software/
Each
Module
Sync
Clock
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Bck