HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 779

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

19.4.9
Data receive procedure and operation in master receiver mode is described below. Figure 19.10
shows the operation timing in master data receive mode. Setting the MDBS bit in the master
control register makes the I
1. In master data receive mode, operation is the same as that in master data transmit mode as to
2. The slave device automatically enters data transmission mode by the signal that indicates the
transmit of a slave address and a 1-byte signal indicating the data transfer direction. At this
time, however, select 1 (receive) for the data transfer direction.
data transfer direction and transmits 1-byte data in synchronization with the SCL clock output
from the master device. The master device generates an interrupt by MDR (bit 1) at the eighth
clock (in the timing of (2) in figure 19.10). Clear the MDR bit to 0 after the master device
Master Receiver Operation (Single Buffer Mode)
SCL
SDA
(Master output)
SDA
(Slave output)
Master IRQ
Slave IRQ
SCL
SDA
(Master output)
SDA
(Slave output)
Master IRQ
Slave IRQ
SDA
SDA
Figure 19.9 Data Transfer Mode Timing Chart
2
C module enter single buffer mode.
S
9
(2)
bit7
bit7
1
1
bit6
bit6
2
2
bit5
bit5
3
3
bit4
bit4
4
4
bit3
bit3
5
5
bit2
bit2
6
6
bit1
bit1
Rev. 2.00 Feb. 12, 2010 Page 695 of 1330
(3)
7
7
(4)
(6)
bit0
bit0
8
8
(7)
(8)
ACK
ACK
Section 19 I
9
9
(5) (2)
bit7
bit7
1
1
(1)
REJ09B0554-0200
2
C Bus Interface