HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 981

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
24.2.28 Port G Pull-Up Control Register (PGPUPR)
PGPUPR is an 8-bit readable/writable register that individually controls the pull-up for pins PTG7
to PTG0 corresponding to each bit in the register when the given pin is used by a peripheral
module. However, for the pins set to the GPIO in the PGCR, the settings in this register will be
invalid.
n = 7 to 0
24.2.29 Port H Pull-Up Control Register (PHPUPR)
PHPUPR is an 8-bit readable/writable register that individually controls the pull-up for pins PTH7
to PTH0 corresponding to each bit in the register when the given pin is used by a peripheral
module. However, for the pins set to the GPIO in the PHCR, the settings in this register will be
invalid.
Bit
7
6
5
4
3
2
1
0
PG7PUPR
PG6PUPR
PG5PUPR
PG4PUPR
PG3PUPR
PG2PUPR
PG1PUPR
PG0PUPR
Bit Name
Initial value:
Initial value:
Initial Value
1
1
1
1
1
1
1
1
R/W:
R/W:
Bit:
Bit:
PUPR
PUPR
PG7
PH7
R/W
R/W
7
1
7
1
PUPR
PUPR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PG6
PH6
R/W
R/W
6
1
6
1
PUPR
PUPR
PG5
PH5
R/W
R/W
Description
Sets individual pull-up control for each pin of Port G
0: PTGn pull-up off
1: PTGn pull-up on
5
1
5
1
PUPR
PUPR
PG4
PH4
R/W
R/W
4
1
4
1
PUPR
PUPR
PG3
PH3
R/W
R/W
3
1
3
1
Rev. 2.00 Feb. 12, 2010 Page 897 of 1330
PUPR
PUPR
PG2
PH2
R/W
R/W
2
1
2
1
PUPR
PUPR
PG1
R/W
R/W
PH1
1
1
1
1
PUPR
PUPR
R/W
R/W
PG0
PH0
1
1
0
0
REJ09B0554-0200

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