HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 997

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
25.3.1
HACCR is a 32-bit read/write register for controlling input/output and monitoring the interface
status.
Initial value:
Initial value:
Bit
31 to 16 ⎯
15
14 to 12 ⎯
11
10
9
R/W:
R/W:
Bit:
Bit:
Control and Status Register (HACCR)
Bit Name
CR
CDRT
WMRT
CR
31
15
R
R
0
0
-
30
14
-
R
-
R
0
0
29
13
R
R
0
0
-
-
Initial Value
All 0
0
All 0
0
0
1
28
12
R
R
0
0
-
-
CDRT WMRT
27
11
W
R
0
0
-
R/W
R
R
R
W
W
R
26
10
W
R
0
0
-
25
R
R
-
-
0
9
1
Description
Reserved
Always 0 for read and write.
Codec Ready
0: The HAC-connected codec is not ready.
1: The HAC-connected codec is ready.
Reserved
Always read as 0. Write prohibited.
HAC Cold Reset
Use a cold reset only after power-on, or only to
exit from the power-down mode by the power-
down command.
[Write]
0: Always write 0 to this bit before writing 1 again.
1: Performs a cold reset on the HAC.
[Read]
Always read as 0.
HAC Warm Reset
Use a warm reset only after power-up, or only to
exit from the power-down mode by the power-
down command.
[Write]
0: Always write 0 to this bit before writing 1 again.
1: Performs a warm reset on the HAC.
[Read]
Always read as 0.
Reserved
Always 1 for read and write.
24
R
R
0
8
0
-
-
23
R
R
0
0
7
-
-
Rev. 2.00 Feb. 12, 2010 Page 913 of 1330
22
R
R
0
6
0
-
-
21
ST
W
R
0
5
0
-
20
R
R
0
4
0
-
-
19
R
R
0
3
-
0
-
REJ09B0554-0200
18
R
R
0
2
0
-
-
17
R
R
0
1
-
0
-
16
R
R
0
0
0
-
-

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