HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 609

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

(c) Software standby → Manual reset
(3) In Exit from Sleep Mode
(a) Sleep → Interrupt
Figure 14.5 STATUS Output in Sequence of Software Standby → Manual Reset
STATUS
Notes:
CKIO
MRESET*
STATUS
RESET
CKIO
Figure 14.6 STATUS Output in Sequence of Sleep → Interrupt
Notes: 1. When standby mode is exited by means of a manual reset, a WDT count is not
1. Normal
2. Sleep
1
(High)
Normal*
2. Normal
3. Standby
4. Reset
5. Bcyc
Normal*
performed. Hold MRESET low for the PLL oscillation stabilization time.
: LL (STATUS1 is low and STATUS0 is low)
: HL (STATUS1 is high and STATUS0 is low)
Oscillation stops
1
2
: LL (STATUS1 is low and STATUS0 is low)
: LH (STATUS1 is low and STATUS0 is high)
: HH (STATUS1 is high and STATUS0 is high)
: Bus clock cycle
Standby*
3
Reset
0–30 Bcyc*
Undefined
Sleep*
5
Interrupt request
2
Rev. 2.00 Feb. 12, 2010 Page 525 of 1330
0–20 Bcyc*
Reset*
4
5
Normal*
Normal*
REJ09B0554-0200
2
1