HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 484

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
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11.3.5
DMAOR is a 32-bit readable/writable register that specifies the DMA mode and channel priorities,
and enables or disables DMA transfer.
Initial value:
Initial value:
Bit
31 to 16 —
15
14
13 to 10 —
9
8
Rev. 2.00 Feb. 12, 2010 Page 400 of 1330
REJ09B0554-0200
R/W:
R/W:
Bit:
Bit:
DMA Operation Register (DMAOR)
DMS1 DMS0
Bit Name
DMS1
DMS0
PR1
PR0
R/W
31
15
R
0
0
-
R/W
30
14
-
R
0
0
29
13
R
R
0
0
-
-
Initial Value
All 0
0
0
All 0
0
0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
26
10
R
R
-
0
0
-
R/W
R
R/W
R/W
R
R/W
R/W
PR1
R/W
25
R
-
0
9
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
DMA Mode Select 1 and 0
These bits select the transfer mode. Set these bits
when DMAOR.DME = 0.
Reserved
These bits are always read as 0.The write value
should always be 0.
Priority Mode 1 and 0
These bits determine the order of priority for
channel execution when transfer requests are
made for multiple channels simultaneously.
00: CH0 > CH1 > CH2 > CH3 > CH4 > CH5 >
01: CH0 > CH2 > CH3 > CH4 > CH5 > CH6 >
10: CH2 > CH0 > CH1 > CH3 > CH4 > CH5 >
11: Round robin mode
PR0
R/W
00: External-request 2-channel mode
11: DMABRG mode*
Other than above: Setting prohibited
Note: *
24
R
0
8
0
-
CH6 > CH7
CH7 > CH1
CH6 > CH7
23
R
R
0
7
0
-
-
Make this setting when CHCR0 has its
initial value of H'0000 0000.
22
R
R
0
0
6
-
-
21
R
R
0
5
0
-
-
20
R
R
0
4
0
-
-
19
R
0
3
0
R
-
-
R/W
AE
18
R
0
2
0
-
NMIF
R/W
17
R
0
1
0
-
DME
R/W
16
R
0
0
0
-

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