HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 642

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

16.3.5
In output compare mode, these registers specify the value to be compared with the free-running
timer. In input capture mode, this register stores the free-running timer values or the 16-bit timer
values on the active edge of the input. Every time an edge is detected, these registers are updated
and the new captured value will be saved.
Initial value:
Initial value:
16.3.6
In output compare mode, these registers specify the value to be compared with the free-running
timer. When this value is reached, the timer output is reset to the inactive state.
Initial value:
Initial value:
16.3.7
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 558 of 1330
REJ09B0554-0200
R/W:
R/W:
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Bit:
Bit:
Channels 0 to 3 Time Registers (CMTCH0T to CMTCH3T)
Channels 0 to 3 Stop Time Registers (CMTCH0ST to CMTCH3ST)
Channels 0 to 3 Counters (CMTCH0C to CMTCH3C)
R/W
R/W
R/W
R/W
R/W
31
15
31
15
31
15
R
0
0
0
0
0
-
-
R/W
R/W
R/W
R/W
R/W
30
14
30
14
30
14
R
0
0
0
0
0
-
-
R/W
R/W
R/W
R/W
R/W
29
13
29
13
29
13
R
0
0
0
0
0
-
-
R/W
R/W
R/W
R/W
R/W
28
12
28
12
28
12
R
0
0
0
0
0
-
-
R/W
R/W
R/W
R/W
R/W
27
11
27
11
27
11
R
0
0
0
0
0
-
-
R/W
R/W
R/W
R/W
R/W
26
10
26
10
26
10
R
0
0
0
0
-
-
0
R/W
R/W
R/W
R/W
R/W
25
25
25
R
0
9
0
0
9
0
-
-
9
0
Channel n stop time
Channel n stop time
Channel n counter
Channel n time
Channel n time
R/W
R/W
R/W
R/W
R/W
24
24
24
R
0
8
0
0
8
0
8
0
-
-
R/W
R/W
R/W
R/W
R/W
23
23
23
R
0
7
0
0
7
0
7
0
-
-
R/W
R/W
R/W
R/W
R/W
22
22
22
R
0
6
0
0
6
0
6
0
-
-
R/W
R/W
R/W
R/W
R/W
21
21
21
R
0
5
0
0
5
0
5
0
-
-
R/W
R/W
R/W
R/W
R/W
20
20
20
R
0
4
0
0
4
0
4
0
-
-
R/W
R/W
R/W
R/W
R/W
19
19
19
R
0
3
0
0
3
0
3
0
-
-
R/W
R/W
R/W
R/W
R/W
18
18
18
R
0
2
0
0
2
0
2
0
-
-
R/W
R/W
R/W
R/W
R/W
17
17
17
R
1
1
1
0
0
0
0
0
-
-
R/W
R/W
R/W
R/W
R/W
16
16
16
R
0
0
0
0
0
0
0
0
-
-