HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 554

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

11.6.4
To receive audio data in DMA transfer, specify DMABRG mode in bits DMS1 and DMS0 in
DMAOR and a transfer request source and request acceptance priority order in DMARSRA and
DMARCR. Then, specify the start address of a receive buffer storing receive audio data in
DMAARXDAR and the number of transfer bytes in DMAARXTCR. Writing 1 to the RDE bit in
DMAACR starts receiving the data.
11.6.5
To transmit audio data in DMA transfer, specify DMABRG mode in bits DMS1 and DMS0 in
DMAOR and a transfer request source and request acceptance priority order in DMARSRA and
DMARCR. Specify the start address of a transmit buffer storing transmit audio data in
DMAATXSAR and the number of transfer bytes in DMAATXTCR. Writing 1 to the TDE bit in
DMAACR starts transmitting the data.
Rev. 2.00 Feb. 12, 2010 Page 470 of 1330
REJ09B0554-0200
DMA Audio Receive Operation
DMA Audio Transmit Operation