HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 75

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 33.78 LCDC Module Signal Timing .............................................................................. 1292
Figure 33.79 HAC Cold Reset Timing ...................................................................................... 1293
Figure 33.80 HAC Cold Reset Timing ...................................................................................... 1293
Figure 33.81 HAC Clock Input Timing..................................................................................... 1293
Figure 33.82 HAC Interface Module Signal Timing ................................................................. 1294
Figure 33.83 SSI Clock Input/Output Timing ........................................................................... 1295
Figure 33.84 SSI Transmit Timing (1) ...................................................................................... 1295
Figure 33.85 SSI Transmit Timing ............................................................................................ 1295
Figure 33.86 SSI Receive Timing (1)........................................................................................ 1295
Figure 33.87 SSI Receive Timing (2)........................................................................................ 1296
Figure 33.88 Output Load Circuit.............................................................................................. 1297
Figure 33.89 Load Capacitance-Delay Time ............................................................................. 1298
Appendix
Figure A.1
Figure A.2
Figure E.1
Figure F.1
Figure F.2
Package Dimensions (BP-256F/BP-256FV) ........................................................ 1299
Package Dimensions (BP-256B/BP-256BV) ....................................................... 1300
Instruction Prefetch .............................................................................................. 1324
Power-on and Power-off Procedure (1)................................................................ 1327
Power-on and Power-off Procedure (2)................................................................ 1327
Rev. 2.00 Feb. 12, 2010 Page lxxiii of lxxxii
REJ09B0554-0200