HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 483

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 11:
RS3
0
1
Table 11.4 DMABRG Mode (DMS[1:0] in DMAOR = 11)
Notes: 1. External requests can be accepted in all channels. DREQ0 to DREQ3 can be used.
2. DMARSRA and DMARSRB values should be specified in addition to setting this bit.
3. DMABRG requests can only be accepted in channel 0. A DMABRG request is a
4. Only single address mode for synchronous DRAM can be set.
5. On-chip peripheral modules except for LCDC, HAC, SSI, USB, and TMU.
Bit 10:
RS2
0
1
0
1
Note that the DREQ pin number and channel number do not match.
transfer request from the LCDC, HAC(0)/(1), SSI(0)/(1), and USB. This bit is
automatically set when a DMABRG request is issued.
Bit 9:
RS1
0
1
0
1
0
1
0
1
Bit 8:
RS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
External request*
Dual address mode
External address space → external address space
Setting prohibited
External request*
Single address mode*
device
External request*
Single address mode*
space
Auto-request (external address space → external address
space)
Auto-request (external address space → on-chip peripheral
module)
Auto-request (on-chip peripheral module → external address
space)
On-chip peripheral module request*
External address space → on-chip peripheral module
Setting prohibited
Setting prohibited
Setting prohibited
Setting prohibited
TMU channel 2 (input capture interrupt)
External address space → external address space
TMU channel 2 (input capture interrupt)
External address space → on-chip peripheral module
TMU channel 2 (input capture interrupt)
On-chip peripheral module → external address space
On-chip peripheral module request*
On-chip peripheral module → external address space
1
1
1
*
*
*
2
2
2
, DMABRG request*
, DMABRG request*
4
4
, External address space → external
, External device → external address
Rev. 2.00 Feb. 12, 2010 Page 399 of 1330
2
2
*
*
5
5
2
2
*
*
3
3
REJ09B0554-0200