HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 716
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
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18.3.2
SIBRR is an 8-bit readable/writable register that sets the transmission/reception bit rate.
The SIBRR setting can be determined from the following formula.
SIM_CLK =
The units of Pck (peripheral clock) and SIM_CLK output clock are MHz.
brr is the value specified in BRR[2:0].
18.3.3
SISCR is an 8-bit readable/writable register that enables or disables transmission or reception
operation, the serial clock output, and interrupt requests for the smart card interface.
Rev. 2.00 Feb. 12, 2010 Page 632 of 1330
REJ09B0554-0200
Bit
7 to 3
2
1
0
Bit Rate Register (SIBRR)
Serial Control Register (SISCR)
Bit
Name
⎯
BRR2
BRR1
BRR0
2 (brr + 1)
Pck
Initial
Value
All 0
1
1
1
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
R/W
R
R/W
R/W
R/W
R/W
TIE
R
7
0
7
0
-
RIE
R/W
Explanation
Reserved
These bits are always read as 0. The write value should
always be 0.
These bits set the transmit/receive bit rates 2 to 0.
6
0
R
6
0
-
R/W
TE
R
5
0
5
0
-
R/W
RE
4
0
4
0
R
-
WAIT
R/W
_IE
R
3
0
3
0
-
BRR2 BRR1 BRR0
TEIE CKE1 CKE0
R/W
R/W
2
2
1
0
R/W
R/W
1
0
1
1
R/W
R/W
0
1
0
0
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