HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 986

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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HD6417760BL200AV
Manufacturer:
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24.2.34 DMA Pin Control Register (DMAPCR)
DMAPCR is a 16-bit readable/writable register that controls the states of the DMAC pins
(DREQ0, DREQ1, DRAK0, DRAK1, DACK0, and DACK1) and DMABRG reset.
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 902 of 1330
REJ09B0554-0200
Bit
15
14
13
12
11
10
9
8
7
6
R/W:
Bit:
DREQ
Bit Name
DREQP0
DREQP1
DACKP0
DACKD0
DACKP1
DACKD1
DRAKP0
DRAKD0
R/W
P0
15
1
14
R
0
-
DREQ
R/W
P1
13
1
Initial value
1
0
1
0
0
1
0
1
0
1
12
R
0
-
DACK
R/W
P0
11
0
DACK
R/W
D0
10
1
R/W
R/W
R
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
DACK
R/W
P1
9
0
Description
Controls pull-up for DREQ0.
0: DREQ0 pull-up off
1: DREQ0 pull-up on
Reserved
This bit is always read as 0, and the write value
should always be 0.
Controls the pull-up for DREQ1.
0: DREQ1 pull-up off
1: DREQ1 pull-up on
Reserved
This bit is always read as 0, and the write value
should always be 0.
Controls the pin state for DACK0 in software
standby mode.
00: Hi-Z state
01: Output
10: Hi-Z state with pull-up on
11: Setting prohibited
Controls the pin state for DACK1 in software
standby mode.
00: Hi-Z state
01: Output
10: Hi-Z state with pull-up on
11: Setting prohibited
Controls the pin state for DRAK0 in software
standby mode.
00: Hi-Z state
01: Output
10: Hi-Z state with pull-up on
11: Setting prohibited
DACK
R/W
D1
8
1
DRAK
R/W
P0
7
0
DRAK
R/W
D0
6
1
DRAK
R/W
P1
5
0
DRAK
R/W
D1
4
1
R
3
0
-
2
0
R
-
R
1
0
-
BRG
RST
R/W
0
0

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