HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 868

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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21.5.2
ED (endpoint descriptor) and TD (transfer descriptor) that define each transfer transaction of the
USB host controller must be placed such that each Dword is aligned on a longword boundary
(addresses 4n to 4n + 3) of the memory. Each descriptor must be aligned on a memory address
boundary prescribed by the OpenHCI specification Ver.1.0.
21.6
When modifying initial settings of the NOCP or OCPM bits in HcRhDescriptorA after reset, keep
the following in mind.
1. The initial values are NOCP=1 and OCPM=0, and the USB host controller does not detect
2. Making the settings in step 1 above will not change the settings in the OCI and OCIC bits in
3. Making the settings in step 1 above will set HcInterruptStatus.RHSC = 1 even if a port is not in
Rev. 2.00 Feb. 12, 2010 Page 784 of 1330
REJ09B0554-0200
overcurrent. To use the overcurrent detection, set NOCP = 0 and OCPM = 1 simultaneously.
Modify these bits only once during USB host controller initialization. Do not modify them
more than once.
HcRhStatus for overcurrent condition information. These bits should be ignored.
overcurrent condition. Therefore, perform interrupt handling processing shown in figure 21.5.
Storage Format of the Descriptor
Restrictions on HcRhDescriptorA
Figure 21.5 Example of RHSC Interrupt Handling
Perform handling for interrupt sources
indicated by HcRhStatus and
HcRhPortStatus1
Start of RHSC interrupt handling
Clear RHSC in HcInterruptStatus
End of RHSC interrupt handling
Interrupt source is
set in HcRhStatus and
HcRhPortStatus1?
Yes
No

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