HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 824

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

(2) Reception using Interrupt Data Flow Control
When an underflow or overflow error condition is met, the CHNO[1:0] and SWNO bits can be
used to recover the SSI module to a known status. When an underflow or overflow occurs, the
host CPU can read the number of channels and the number of system words to determine what
point the serial audio stream has reached. In the transmitter case, the host CPU can skip forward
through the data it wants to transmit until it finds the sample data that matches what the SSI
module is expecting to transmit next, and so resynchronize with the audio data stream. In the
Rev. 2.00 Feb. 12, 2010 Page 740 of 1330
REJ09B0554-0200
Yes
Figure 20.24 Reception using Interrupt Data Flow Control
specify configuration bits
enable error interrupts
disable error interrupt,
disable data interrupt,
Wait for idle interrupt
enable data interrupt,
receive data register
Disable SSI module,
Enable SSI module,
enable idle interrupt
from SSI module
Wait for interrupt
More data to be
Read data from
Release reset,
Error interrupt?
received?
in SSICR
from SSI
Start
End
SSI
No
No
Yes
Specify TRMD, EN, SCKD,
SWSD, MUEN, DEL, PDTA,
SDTA, SPDP, SWSP, SCKP,
SWL, DWL, CHNL
EN = 1,
DIEN = 1,
UIEN = 1, OIEN = 1
EN = 0,
DIEN = 0
UIEN = 0, OIEN = 0,
IIEN = 1
Use SSI status register bits
after underflow/overflow
to realign data