HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 815

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

7. Parallel Right Aligned with Delay
8. Mute Enabled
20.4.3
The compressed mode is used to transfer a continuous bit stream. This would typically be a
compressed bit stream which requires downstream decoding.
In streaming mode (burst mode not enabled) there is no concept of a data word. However in order
to receive and transmit it is necessary to transfer between the serial bus and word formatted
memory. Therefore the word boundary selection is arbitrary during receive/transmit and must be
dealt with by another module. When burst mode is enabled then data bits being transmitted can be
identified by virtue of the fact that the serial clock output is only activated when there is a word to
be output and only the required number of clock pulses necessary to clock out each 32-bit word
are generated. The serial bit clock stops at a low level when SSICR.SCKP = 0, and at a high level
when SSICR.SCKP = 1. Note burst mode is only valid in the context of the SSI module being a
transmitter of data. Burst mode data cannot be received by this module.
Data is transmitted and received in blocks of 32 bits, and the first bit received/transmitted bit is bit
31 when stored in memory.
SSI_SDATA
SSI_SDATA
SSI_SCK
SSI_SCK
SSI_WS
SSI_WS
As basic sample format configuration except PDTA = 1
As basic sample format configuration except MUEN = 1 (TD data ignored)
Compressed Modes
TD0
0
0
0
Figure 20.16 Parallel Right Aligned with Delay
0
0
TD3 TD2 TD1
0
1st Channel
Figure 20.17 Mute Enabled
1st Channel
0
0
TD0
0
0
0
0
0
Rev. 2.00 Feb. 12, 2010 Page 731 of 1330
TD3 TD2
0
2nd Channel
2nd Channel
0
TD1 TD0
0
0
0
REJ09B0554-0200
0
0
0
0
0
TD3
0