HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1019

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
This LSI supports a multimedia card interface (MMCIF). The MMC mode interface can be
utilized. The MMCIF is a clock-synchronous serial interface that transmits/receives data that is
distinguished in terms of command and response. A number of commands/responses are
predefined in the multimedia card. As the MMCIF specifies a command code and command
type/response type upon the issuance of a command, commands extended by the secure
multimedia card (Secure-MMC) and additional commands can be supported in the future within
the range of combinations of currently defined command types/response types.
26.1
The MMCIF has the following features:
• Interface that complies with The MultiMediaCard System Specification Version 2.11
• Supports MMC mode
• 20-Mbps bit rate (max.) for the card interface at a peripheral operating clock of 20 MHz
• Incorporates 64 data-transfer FIFOs of 16 bits
• Supports DMA transfer
• Four interrupt sources
• Interface via the MCCLK output (transfer clock output) pin, the MCCMD input/output
FIFO empty/full, command/response/data transfer complete, transfer error, and FIFO ready
(command output/response input) pin, and the MCDAT input/output (data input/output) pin
Section 26 Multimedia Card Interface (MMCIF)
Features
Rev. 2.00 Feb. 12, 2010 Page 935 of 1330
REJ09B0554-0200

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