HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 87

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
Item
FPU
Features
On-chip floating-point coprocessor
Supports single-precision (32 bits) and double-precision (64 bits)
Supports IEEE754-compliant data types and exceptions
Two rounding modes: Round to Nearest and Round to Zero
Handling of denormalized numbers: Truncation to zero or interrupt
generation for compliance with IEEE754
Floating-point registers: 32 bits × 16 × 2 banks
⎯ (single-precision: 32-bit × 16 or double-precision: 64-bit × 8) × 2 banks
32-bit CPU-FPU floating-point communication register (FPUL)
Supports FMAC (multiply-and-accumulate) instruction
Supports FDIV (divide) and FSQRT (square root) instructions
Supports FLDI0/FLDI1 (load constant 0/1) instructions
Instruction execution times:
⎯ Latency (FMAC/FADD/FSUB/FMUL): 3 cycles (single-precision), 8
⎯ Pitch (FMAC/FADD/FSUB/FMUL): 1 cycle (single-precision), 6 cycles
Note: FMAC is supported for single-precision only.
3-D graphics instructions (single-precision only):
⎯ 4-dimensional vector conversion and matrix operations (FTRV): 4
⎯ 4-dimensional vector inner product (FIPR): 1 cycle (pitch), 4 cycles
5-stage pipeline
cycles (double-precision)
(double-precision)
cycles (pitch), 7 cycles (latency)
(latency)
Rev. 2.00 Feb. 12, 2010 Page 3 of 1330
REJ09B0554-0200

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