HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1043

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
7
6
5
4
Bit
Name
FEI
FFI
DRPI
DTI
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
0: No interrupt
[Clearing condition]
Write 0 after reading FEI = 1.
1: Interrupt requested
[Setting condition]
When FIFO becomes empty while FEIE = 1 and
data is being transmitted
(when the FIFO_EMPTY bit in CSTR is set)
0: No interrupt
[Clearing condition]
Write 0 after reading FFI = 1.
1: Interrupt requested
[Setting condition]
When FIFO becomes full while FFIE = 1 and
data is being received
(when the FIFO_FULL bit in CSTR is set)
Data Response Interrupt
0: No interrupt
[Clearing condition]
Write 0 after reading DRPI = 1.
1: Interrupt requested
[Setting condition]
When the CRC status is received while DRPIE
= 1.
0: No interrupt
[Clearing condition]
Write 0 after reading DTI = 1.
1: Interrupt requested
[Setting condition]
When the number of bytes of data transfer
specified in TBCR ends while DTIE = 1.
FIFO Empty Interrupt
FIFO Full Interrupt
Data Transfer End Interrupt
Rev. 2.00 Feb. 12, 2010 Page 959 of 1330
REJ09B0554-0200
Interrupt
output
MMCI0
MMCI0
MMCI1
MMCI1