HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 620

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 15.2 Register Configuration (2)
Common
2
Note:
15.3.1
TSTR is an 8-bit readable/writable register that specifies whether TCNT in each channel is
operated or stopped.
Rev. 2.00 Feb. 12, 2010 Page 536 of 1330
REJ09B0554-0200
Ch.
0
1
Bit
7 to 3
2
Register Name
Timer start register
Timer constant register 0
Timer counter 0
Timer control register 0
Timer constant register 1
Timer counter 1
Timer control register 1
Timer constant register 2
Timer counter 2
Timer control register 2
Input capture register 2
* After exiting hardware standby mode, this LSI enters the power-on reset state caused
Bit Name
—
STR2
Timer Start Register (TSTR)
by the RESET pin.
Initial value:
Initial Value R/W
All 0
0
R/W:
Bit:
R
7
0
-
TSTR
TCOR2 H'FFFF FFFF H'FFFF FFFF Retained
TCNT2
TCR2
TCPR2
Abbrev.
TCOR0 H'FFFF FFFF H'FFFF FFFF Retained
TCNT0
TCR0
TCOR1 H'FFFF FFFF H'FFFF FFFF Retained
TCNT1
TCR1
6
0
R
R
R/W
-
H'00
Power-on
Reset by
RESET Pin/
WDT/H-UDI
H'0000
H'0000
H'FFFF FFFF H'FFFF FFFF Retained
H'0000
Retained
H'FFFF FFFF H'FFFF FFFF Retained
H'FFFF FFFF H'FFFF FFFF Retained
R
5
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Counter Start 2
Specifies whether TCNT2 is operated or stopped.
0: TCNT2 count operation is stopped
1: TCNT2 performs count operation
4
0
R
-
R
3
-
0
H'00
H'0000
Retained
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
H'0000
H'0000
STR2 STR1 STR0
R/W
2
0
R/W
0
1
Sleep
by Sleep
Instruction/
Deep Sleep
Retained
Retained
Retained
Retained
Retained
R/W
0
0
by
Hardware
*
Standby
H'00
Retained
Retained
Retained
Retained
by
Software/
Each
Module
Retained
Retained
Retained
Retained
Retained
Retained