HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 352

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

10.5.3
BCR3 is a 16-bit readable/writable register that specifies the selection of either the MPX interface
or the SRAM interface and specifies the burst length when the synchronous DRAM interface is
used.
Do not access off-chip memory space other than area 0 until register initialization is complete.
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 268 of 1330
REJ09B0554-0200
Bit
15
14
13
12 to 1 ⎯
0
R/W:
Bit:
Bit
Name
MEM
MODE
A1MPX
A4MPX
SDBL
Bus Control Register 3 (BCR3)
MODE
MEM
R/W
15
0
MPX
R/W
A1
14
0
Initial
Value
0
0
0
All 0
1
MPX
R/W
A4
13
0
12
R
0
-
R/W
R/W
R/W
R/W
R
R/W
11
R
0
-
10
R
0
-
Description
A1MPX/A4MPX Enable
Determines whether to use A1MPX and A4MPX or to
use MEMMPX for selecting the MPX interface or the
SRAM interface.
0: MPX or SRAM interface is selected by MEMMPX
1: MPX or SRAM interface is selected by A1MPX and
MPX-Interface Setting for Area 1
Specifies the type of memory connected to area 1. This
setting is validated by the MEMMODE bit.
0: SRAM/byte control SRAM interface is selected for
1: MPX interface is selected for area 1
MPX-Interface Setting for Area 4
Specifies the type of memory connected to area 4. This
setting is validated by the MEMMODE bit.
0: SRAM/byte control SRAM interface is selected for
1: MPX interface is selected for area 4
Reserved
These bits are always read as 0. The write value should
always be 0.
Burst Length
Sets the burst length when the synchronous DRAM
interface is used. The burst-length setting is only valid
when the bus width is 32 bits.
0: Burst length is 8
1: Burst length is 4
A4MPX
area 1
area 4
R
9
0
-
R
8
0
-
7
0
R
-
R
0
6
-
R
5
0
-
4
0
R
-
3
0
R
-
2
0
R
-
1
0
R
-
SDBL
R/W
0
1